Organic field effect transistors (OFETs) are used in display devices and logic capable circuits. A conventional OFET typically comprises source, drain and gate electrodes, a semiconducting layer comprising an organic semiconductor (OSC) material, and a gate insulator layer comprising a dielectric material between the OSC layer and the gate electrode.
FIG. 1 shows a conventional top gate OFET device according to prior art, comprising a substrate (1), source and drain electrodes (2), an OSC layer (3), a gate insulator layer (4) comprising a dielectric, a gate electrode (5), and a second insulator or protection layer (6) to shield the gate electrode from further layers or devices provided on top of the OFET.
FIG. 2 shows a conventional bottom gate OFET device according to prior art, comprising a substrate (1), source and drain electrodes (2), an OSC layer (3), a gate insulator layer (4) comprising a dielectric, a gate electrode (5), and a second insulator or protection layer (6) to shield the source and drain electrodes from further layers or devices provided on top of the OFET.
WO 03/052841 A1 discloses an OFET wherein the gate insulator layer comprises a dielectric material having low permittivity ∈ (also known as relative permittivity or dielectric constant) of less than 3.0 (“low k material”). The use of such low k materials is reported to reduce charge trapping at the dielectric/OSC interface and to give improved transistor performance, in particular in devices prepared by solution processing. WO 03/052841 A1 further reports that commercially available fluoropolymers such as Cytop™ (from Asahi Glass) or Teflon AF™ (from DuPont) are especially suitable as low k materials.
The use of fluoropolymers as gate insulator is advantageous for solution processed OFET devices wherein the OSC material is selected from soluble, substituted oligoacenes, such as pentacene, tetracene or anthracene, or heterocyclic derivatives thereof, as disclosed for example in WO 2005/055248. These OSC materials are soluble in most common organic solvents. Therefore, when preparing a top gate device, the solvents for the gate insulator formulation have to be carefully chosen, in order to avoid dissolution of the OSC material when depositing the formulation for the gate insulator (4) on top of the OSC layer (3). Similarly, when preparing a bottom gate device dissolution of the gate insulator material has to be avoided when depositing the formulation for the OSC layer (3) on top of the gate insulator (4). Since fluoropolymers are soluble in perfluorinated solvents, which are orthogonal to the typical solvents used for the above-mentioned OSC materials, they are especially suitable as gate insulator material in these devices.
However, the above-mentioned fluoropolymers have certain drawbacks, especially regarding mass production of OFET devices. The main drawbacks are based on the poor processability and limited structural integrity of the fluoropolymers. Thus, fluoropolymers often do not adhere well on the substrate (1) and the OSC layer (3). Also, it is often difficult to process and adhere further coatings, like the gate electrode (5) or protection layers (6), on top of the gate insulator (4) due to bad adhesion (peeling off) and bad wetting. In addition, many fluoropolymers, like e.g. those of the Cytop™ series, have low glass temperatures Tg (˜100-130° C.), which may cause problems during certain process steps. For example, heating of the dielectric layer to Tg when applying a metallized gate electrode layer on top of it, e.g. by sputtering, can cause cracking of the polymer due to built-in stress. Even when there is no residual stress in the film, heating above Tg can cause differential expansion and hence wrinkling of the polymer. On the other hand, fluoropolymers with higher Tg, like those of the Teflon AF™ series (e.g. Teflon AF 2400 with Tg=240° C.), may overcome the wrinkling or cracking problems, but do often not coat well on big substrates, and provide bad adhesion for additional layers.
It is therefore an aim of the present invention to provide improved materials and methods for preparing electronic devices, in particular top gate OFETs, which do not have the drawbacks of prior art materials and methods, and allow time-, cost- and material-effective production of electronic devices on large scale. It is especially desired to improve adhesion and structural integrity of the dielectric layer when manufacturing an electronic device by solution processing techniques. Another aim of the invention is to provide improved electronic devices, especially OFETs, obtained from such materials and methods. Other aims of the present invention are immediately evident to the person skilled in the art from the following detailed description.
It was found that these aims can be achieved by providing methods, materials and devices as claimed in the present invention. In particular, the inventors of the present invention have found that it is possible to overcome at least some of the above-mentioned drawbacks by applying an interlayer between the gate insulator layer and the gate electrode and/or the gate electrode protection layer, wherein said interlayer comprises a copolymer comprising polar repeating units, like vinylidene fluoride or vinylfluoride, and unpolar repeating units, like perfluoroalkylene units. The use of such an interlayer improves adhesion, wettability and structural integrity of the gate insulator layer during application of further device layers in subsequent manufacturing process steps.